Feb 22, 2018

[paper submission] MIXDES 2018


This year the 25th International Conference "Mixed Design of Integrated Circuits and Systems", MIXDES 2018 will take place on June 21-23, 2018 in Gdynia, Poland

Submit a paper <https://www.mixdes.org/Mixdes3/>

Feb 21, 2018

#NEST is a simulator for spiking neural network #model https://t.co/BZaG7UkZXD https://t.co/0yGf5g7nNJ


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February 21, 2018 at 08:33PM
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[paper] Low Power Low Jitter 0.18 CMOS Ring VCO Design with Strategy Based on EKV3.0 Model

Amine AYED and Hamadi GHARIANI
LETI Laboratory-ENIS
Sfax, Tunisia
IJACSA Vol. 8, No. 12, 2017

Abstract—In this paper, the design of micro-power CMOS ring VCO with minimum jitter intended for a concept of frequency synthesizer in biotelemetry systems is studied. A design procedure implemented in MATLAB is described for a circuit realization with TSMC 0.18μm CMOS technology. This conventional design methodology based on EKV3.0 model is clearly suited to the challenges of analog circuits design with reduced channel width. Measures realized with ADS confirmed methodology capability to circuit sizing respecting the specifications of application. The designed ring VCO operates at a central frequency of 433MHz in ISM band with an amplitude of oscillation equal to 500 mV. The integration area was intrinsic (without buffers and without external capacitances). The simulated phase noise is about -108 dBc/Hz at 1MHz, the value of rms jitter is 44.8 ps and the power consumption of the designed VCO is 6.37 mW @ 433 MHz [read more...]

Fig.: Eye diagram for a VCO output @ 433MHz


Feb 8, 2018

Today in Tech - 1956 - Douglas “Doug” Ross is best known to have originated the term “CAD” https://t.co/xO2K99dn7i #model


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February 08, 2018 at 10:20PM
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