Jan 31, 2017

#Memristors, the fourth fundamental circuit element? https://t.co/V03Zp7Oaxw #cad #feedly #papers


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January 31, 2017 at 02:53PM
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[chapter] Near-Threshold Digital Circuits for Nearly-Minimum Energy Processing

Near-Threshold Digital Circuits for Nearly-Minimum Energy Processing
Massimo Alioto
Department of Electrical & Computer Engineering, National University of Singapore
in Enabling the Internet of Things; pp 95-148 
DOI: 10.1007/978-3-319-51482-6_4
This chapter addresses the challenges and the opportunities to perform computation with nearly-minimum energy consumption through the adoption of logic circuits operating at near-threshold voltages. Simple models are provided to gain an insight into the fundamental design tradeoffs. A wide set of design techniques is presented to preserve the nearly-minimum energy feature in spite of the fundamental challenges in terms of performance, leakage and variations. Emphasis is given on debunking the incorrect assumptions that stem from traditional low-power common wisdom at above-threshold voltages. The traditional EKV model is very useful for quick estimates, but it oversimplifies the IV characteristics that is observed in actual nanometer CMOS technologies [read more...]

[paper] Electronically tunable MOSFET-based resistor

Electronically tunable MOSFET-based resistor used in a variable gain amplifier or filter
W. L. Tan, C. H. Chang and L. Siek
Nanyang Technological University; Singapore 
2016 International Symposium on Integrated Circuits (ISIC), Singapore, 2016, pp. 1-4.
doi: 10.1109/ISICIR.2016.7829715
Abstract: We present a new design of an electronically tunable linear MOS resistor circuit that operates in the subthreshold saturation region, supported with mathematical derivations and simulation results using CSM0.13µm technology. For a given potential difference across the MOS resistor, its gate voltage will be automatically biased through feedback to provide the correct amount of current based on the desired resistance set through the bias current. Equating the output current of the OTA with the subthreshold equation of the EKV model. In comparison with an existing design, the proposed design offers equal tunabilty with 36 less transistors for unidirectional current and 28 less transistors with one more bias current transistor for bidirectional current. A bias current ranging between 10nA to 100nA offers a tunable linear resistance between 20MΩ to 140MΩ [read more...]

Jan 30, 2017

OCS: Octave Circuit Simulator

OCS was developed during the CoMSON (Coupled Multiscale Simulation and Optimization) project which involved several universities but also several industrial partners. Each of the industrial partners at the time was using its own circuit simulation software and each software had different file formats for circuit netlists. Given the purposes of the project and the composition of the consortium the main design objectives for OCS where
  • provide a format for "element evaluators" independent of time-stepping algorithms
  • provide a "hierarchical" data structure where elements could be composed themselves of lumped-element networks
  • allow coupling of lumped-element networks (0D) and 1D/2D/3D device models
  • use an intermediate/interchange file format so that none of the formats in use by the industrial partners would be favoured over the others
  • be written in an interpreted language for quick prototyping and easy maintenance
  • be Free Software

[Course] Advanced CMOS/FinFET Fabrication

February 6, 2017; Portland, OR, USA

Semiconductor and integrated circuit developments continue to proceed at an incredible pace. For example, today’s microprocessor chips have one thousand times the processing power of those a decade ago. These challenges have been accomplished because of the integrated circuit industry’s ability to track something known as Moore’s Law. Moore’s Law states that an integrated circuit’s processing power will double every two years. This has been accomplished by making devices smaller and smaller. The question looming in everyone’s mind is “How far into the future can this continue?” Advanced CMOS/FinFET Fabrication is a 1-day course that offers detailed instruction on the processing used in a modern integrated circuit, and the processing technologies required to make them. We place special emphasis on current issues related to manufacturing the next generation devices. This course is a must for every manager, engineer and technician working in the semiconductor industry, using semiconductor components or supplying tools to the industry.

Register for this Course


Jan 27, 2017

SimCAS symbolic analog simulator

Simcas is a simple and very flexible analog simulator. SimCAS uses symbolic equations to define components and solves the net system by using a "Computer Algebra System" algorithm [read more at: SimCAS Web Site]

Related papers:

[1] K. Singhal and J. Vlach, "Symbolic analysis of analog and digital circuits," in IEEE Transactions on Circuits and Systems, vol. 24, no. 11, pp. 598-609, Nov 1977. doi: 10.1109/TCS.1977.1084282
[2] G. M. Wierzba, A. Srivastava, V. Joshi, K. V. Noren and J. A. Svoboda, "Sspice-a symbolic SPICE program for linear active circuits," Proceedings of the 32nd Midwest Symposium on Circuits and Systems,, Champaign, IL, 1989, pp. 1197-1201 vol.2. doi: 10.1109/MWSCAS.1989.102070
[3] G. G. E. Gielen, H. C. C. Walscharts and W. M. C. Sansen, "ISAAC: a symbolic simulator for analog integrated circuits," in IEEE Journal of Solid-State Circuits, vol. 24, no. 6, pp. 1587-1597, Dec 1989. doi: 10.1109/4.44994
[4] Rob A. Rutenbar; Georges G. E. Gielen; Brian A. Antao, Interactive AC Modeling and Characterization of Analog Circuits via Symbolic Analysis; Computer-Aided Design of Analog Integrated Circuits and Systems; Year: 2002; Pages: 287 - 312, DOI: 10.1109/9780470544310.ch23
[5] G. Fontana; F. Grasso; A. Luchetta; S. Manetti; M. C. Piccirilli; A. Reatti; A new simulation program for analog circuits using symbolic analysis techniques; 2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD); Year: 2015; Pages: 1 - 4, DOI: 10.1109/SMACD.2015.7301682

[paper] 400 fJ Per-Cycle Frequency Reference for IoT

A 400 fJ Per-Cycle Frequency Reference for Internet of Things
Mathieu Coustans, François Krummenacher, Christian Terrier and Maher Kayal
IEL, École Polytechnique Fédérale de Lausanne, Switzerland

Abstract—This work presents an ultra-low power oscillator designed to target different contexts, such as crystal-assisted time keeping, reference oscillator to optimize the always on domain of a microcontroller or wake-up timer. This oscillator enables ultra-low power operation in 180nm CMOS technology with EKV3 compact model; the core oscillator consumes 2.5 nW at room temperature, with a temperature stability of 14 ppm/°C [-40°C - 60°C] and 0.07 %/V supply sensitivity [read more...]