Download EUROSOI 2010 Final Programme

The final EUROSOI 2010 Programme is available for download.

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Semiconductor-On-Insulator Materials, Devices and Circuits, Physics, Technology and Diagnostics

6th International SOI Conference and 1st Ukrainian-French Seminar

26-30 April 2010, Kyiv, Ukraine

The topics to be covered include the following:
· Semiconductor-on-Insulator (SOI) material technology
· Nanoscale CMOS devices and circuits
· New SOI materials and devices on its basis
· SOI sensors and new SOI systems
· Diagnostic techniques for nanoscale SOI materials and devises
· Technology and economics

Organized by
· Jean-Pierre Raskin
Universite Catholique de Louvain, Electrical Engineering Department, IMIC
· Alexei N. Nazarov
Inst. of Semiconductor Physics, NAS of Ukraine
· Yuri Gomeniuk
Inst. of Semiconductor Physics, NAS of Ukraine

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[mos-ak] MOS-AK/GSA Baltimore meeting on-line publications

MOS-AK/GSA Baltimore meeting on-line publications are available:
http://www.mos-ak.org/baltimore/

I would like to thank all MOS-AK contributors, speakers and panelists
for sharing their compact modeling competence, R&D experience and
delivering valuable MOS-AK presentations. I am sure, that our modeling
event in Baltimore was beneficial to all MOS-AK Workshop attendees.

Organization of our modeling event would not be possible without our
generous sponsor: the IEEE EDS/SSCS Baltimore Chapter. I also would
like to personally acknowledge local organizers, in particular Prof.
Andreas G. Andreou for his dedication, commitment and providing smooth
logistics.

I hope, we would have a next chance to meet all of you and your
academic and industrial partners at future MOS-AK/GSA modeling events
(listed below).

-- with my worm seasons greetings - WG (for the MOS-AK/GSA)
==========================================================
* Rome: April 8-9, www.mos-ak.org/rome
* Tarragona: June'10 www.compactmodelling.eu
* Wroclaw: June 24-26 www.mixdes.org/Special_sessions.htm
* Seville: Sept. 18 www.mos-ak.org
==========================================================

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EDN: The top ten analog engineers

I've just seen this post at EDN. They are talking (yes, it's second-hand talk) about a list of the 10 top analog engineers. Do you think that we could make a similar list for the 10 top Compact Modelers?
Who would you put in such a list? I'd put names of people like Chenming Hu, Erik Vittoz, who are currently in active, but I'm probably too young (;-D) to put older names....
Anyway, actually, Compact Modeling is more about teamwork than about an isolated genius... so I guess that making lists maybe makes not a lot of sense... Or does it?

Compact Modeling Principles, Techniques and Applications

Gildenblat, Gennady (Ed.)

2010, Approx. 250 p., Hardcover

ISBN: 978-90-481-8613-6

The book includes chapters on the MOSFET noise theory, benchmarking of MOSFET compact models, modeling of the power MOSFET, and an overview of the bipolar modeling field. It concludes with two chapters describing the variability modeling including some recent developments in the field.

Table of contents

Student group works on designs for a fully integrated wireless receiver

The group, known as the Microelectronics Students’ Group, has quickly captivated new members and is now composed of more than 20 students. They are presently working towards the design of a fully integrated wireless receiver in sub-micron CMOS.

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Job offer for Modelling Engineer

I copy a job offer I found:

EM Modeling Engineer

Company: Peregrine Semiconductor
Location: San Diego, CA
Please submit resumes to kfedder@psemi.com

Job Description:

Responsible for device and package modeling of Peregrine’s patented high-performance UltraCMOSTM silicon-on-sapphire CMOS process technology. Job functions include: Package model development, RF passive model development, parasitic analysis, test hardware/software setup, statistical modeling, model implementation on multiple EDA platforms. The candidate will work closely with senior modeling engineers to provide a comprehensive set of models to our design engineers as well as foundry customers.



Qualifications:

Education Desired and Experience
PhD in Electrical Engineering or MSEE with 5 years experience in EM modeling.
Must have knowledge base in the following areas:
Strong understanding of electromagnetic theory.
Understanding of transmission line theory.
Experience using SPICE like circuit simulators.
Experience using EM simulators (HFSS, Sonnet, IE3D).
Basic understanding of semiconductor manufacturing.
Basic understanding of semiconductor packaging.
Demonstrated ability developing automation scripts using MATLAB, Perl, MathCad, UNIX scripting, etc.
Knowledge in one or more of the following areas is highly desirable:
EM simulation on semiconductor substrates
Package model or RF model development.
Large signal device or circuit characterization and modeling
Monte Carlo/ statistical modeling
Layout optimization for RF applications
Understanding of the following tools or similar:
Cadence Design System (Virtuoso, Analog Artist, Assura, etc)
Agilent Design System (ADS, Momentum, RFDE)
MATLAB, Perl, IC-CAP
Good written and oral communication skills.
Must be able to work well in a team environment.