after Analogschaltungen'09 in Hannover

The workshop program included following topics:

• Novel CMOS/BiCMOS circuit architectures for the GHz range applications
  
• Models of semiconductor devices for analog/RF (GHz range) applications
  
• Influences of the system design and optimization on the components in the analog circuit applications
• Classical and quantum mechanical effects in analog/RF nano-silicon circuits at GHz frequencies
  

The workshop has been organized by:

• Prof. Dr. -Ing. Wolfgang Mathis, Leibniz Universität Hannover, Institut für Theoretische Elektrotechnik; Appelstr. 9A, 30167 Hannover

in cooperation with:

• Prof. Dr.rer. nat. Doris Schmitt- Landsiedel, TU München; Lehrstuhl für Technische Elektronik
• Prof. Dr. -Ing. Heinrich Klar, TU Berlin; Institut für Technische Informatik und Mikroelektronik
• Prof. Dr.-Ing. Y. Manoli, Universität Freiburg; IMTEK

BOOK: Planar Double-Gate Transistor: From technology to circuit

Planar Double-Gate Transistor: From technology to circuit
Amara, Amara; Rozeau, Olivier (Eds.)
2009, VIII, 212 p., Hardcover
ISBN: 978-1-4020-9327-2
Online version available

SOI Technology Goes Mainstream

SOI Technology Goes Mainstream
The unique characteristics of silicon on insulator are opening the door to new applications and the infrastructure needed to boost and support expanding markets.
Ruth DeJule, Contributing Editor -- Semiconductor International, 3/1/2009

MOS-AK/GSA Workshop: 2-3 April 2009 at IHP in Frankfurt /Oder

MOS-AK/GSA Workshop: 2-3 April 2009 at IHP in Frankfurt /Oder

• Final program (COMON Project Meeting & MOS-AK Workshop)
  
• Free on-line registration
• Driving directions

NanoTech WCM 2009: Workshop on Compact Modeling

NanoTech WCM 2009: Workshop on Compact Modeling
May 3-7, 2009
George R. Brown Convention Center
Houston, Texas, U.S.A.

Symposium Program http://www.nsti.org/Nanotech2009/WCM2009/

NB: Late News Abstracts Due: March 27th 2009 (POSTER Presentation Only)

ESSDERC'09

ESSDERC 2009 (European Solid-State Device Research Conference) will be held in Athens, Greece from 14-18 September 2009, together with ESSCIRC 2009 (European Solid-State Circuits Conference) . The venue will be the Divani Caravel Hotel, a luxury hotel situated in the centre of Athens, and very well connected to the airport by the subway. ESSDERC (European Solid-State Device Research Conference) is the top European conference in semiconductor devices.

Due to its prestige, many researchers from outside Europe use to submit contributions to ESSDERC too.The main themes for original contributions to be submitted to ESSDERC'09 are:

-Advanced CMOS devices
-Processing and Integration
-Telecommunication and Power Devices
-Modeling and Simulation
-Characterization and Reliability
-Memories
,-MEMs, Sisplays and SoC
-Emerging non-CMOS Devices and Technologies.

This year, "Compact circuit modeling for devices and interconnects" is explicitly mentioned as one of the topics in the "Modeling and Simulation" theme.

The deadline for paper submission is April 4 2009.

ESSCIRC and ESSDERC also hold a "Fringe Poster Session" event in addition to the main conference in Athens. This Fringe forum is ideally adequate for the submissions of recent scientific progress which may, in some cases, not be ready for a full paper submission. This forum provides the opportunity to network with the ESSDERC/ESSCIRC community to discuss these ideas and latest results. Reviewing will be carried out by a sub-committee under the main Technical Programme committee, and a separate proceedings will be published on CD for this event. The deadline for submissions for the Fringe Poster Session will be 12 June 2009.

Besides, several related workshops will take place on September 19 2009 at the same location. One of them will be the Autumn MOS-AK Meeting on Compact Modeling.

And no doubt mid-September is a very nice time to visit Athens. Sunny and warm, but not too hot.

CICC'09

The 2009 IEEE Custom Integrated Circuits Conference (CICC) will take place on September 13-16, 2009, at the DoubleTree Hotel in San Jose, California, in the heart of Silicon Valley.CICC is one of the top conferences on circuit design. The main topics of the conference are Analog Circuit Design, Digital and Mixed Signal SoC/ASIP/SIP/3D, Embedded Memory, ICs for MEMs, Manufacturing, Power Management, Test, Circuit Characterization, Debug, and Reliability, Wired Communications, Wireless Designs, and Simulation and Modeling, including Compact Device Modeling. The topics of compact models for extreme environment operation SOI and multiple gate device modeling are explicitly mentioned in the Call for Papers.

The paper submission deadline is April 21.

CICC 2009 will include technical paper presentations (both oral presentations and posters), panel discussions, educational sessions as well as topcial events and exhibits.

CICC is the premier conference devoted to IC development. It is the right conference to find out how to solve design problems and improve circuit design and design techniques

CICC 2009 will intend to show the latest developments in Compact Modeling, for the training of designers and to facilitate a close interaction between designers and compact model developers. It is a wonderful city with many other attractions: golf courses, wineries, and for hikers and nature lovers, the Alum Rock Park. Besides, San Jose, which is called the "Safest Big City in America", has an intense nightlife, with many dance clubs and sports bars.