- Scilab
free/libre and open source software for numerical computation developed by Scilab Enterprises, France. Scilab also includes Xcos which is an open source alternative to Simulink. - Python
general-purpose, high-level, remarkably powerful dynamic programming language that is used in a wide variety of application domains. It supports multiple programming paradigms. - eSim
(formerly known as Oscad/FreeEDA) is an EDA tool for circuit design, simulation, analysis and PCB design. It is developed by the FOSSEE team at IIT Bombay - Osdag
free/libre and open-source software which allows the user to design steel structures using a graphical user interface. The GUI also provides 3D visualization of the designed component and images - DWSIM
free/libre and open source CAPE-OPEN compliant chemical process simulator. Helps understand the behavior of Chemical Systems by using rigorous thermodynamic and unit operations models. - OpenFOAM
free/libre and open source CFD toolbox useful to solve anything from complex fluid flows involving chemical reactions, turbulence and heat transfer, to solid dynamics and electromagnetics. - OpenModelica
free/libre and open source environment based on the Modelica modelling language for modelling, simulating, optimising and analysing complex dynamic systems. - OpenPLC
free/libre and open source Programmable Logic Controller creating opportunities for people to study its concepts, explore new technologies and share the resources. - FLOSS-Arduino
control of Arduino using Free/Libre Open-Source Software. The interface helps the user to perform embedded systems experiments on the Arduino Uno board. - SBHS
(Single Board Heater System) is a lab-in-a-box setup useful for teaching and learning control systems. - R
programing language and environment for statistical computing and graphics. - QGIS
(Quantum GIS) is a free and open-source desktop Geographic Information System (GIS) application. - FOCAL
an initiative by FOSSEE to promote Open Source Software in computer graphics. - SOUL
(Science OpensoUrce Software for Teaching Learning) is a collection of ICT software that can be used as teaching/learning tools by the community of educators and the learners to teach/ learn the basic as well as the advanced concepts in science subjects
Mar 21, 2024
[FOSSEE] Better Education
Jan 18, 2024
[paper] Open-source design of integrated circuits
* Institute for Integrated Circuits, Johannes Kepler University Linz, Austria
Acknowledgements: The authors thank Johannes Kepler University for funding the open-access publication, Google and SkyWater Technologies for igniting this recent wave of open-source IC design, and the large crowd of enthusiasts spending their time on developing and maintaining an extensive array of exciting open-source EDA projects. Open access funding provided by Johannes Kepler University, Linz.
Jan 5, 2024
ISHI-kai January 2024 event
ープンソースPDKやEDAの状況について、キーマンに語っていただきます
Schedule
Friday, January 26, 2024, 18:00-21:00 (Reception: 18:30)
Venue (onsite)
Google Shibuya Office
3-21-3 Shibuya, Shibuya-ku, Tokyo
Shibuya Stream Google reception meeting
Online Broadcast:
Google Meet: https://meet.google.com/ksa-tjaw-ges
Participation Fee
free
Time | Speaker | Title | Lecture Outline |
---|---|---|---|
Until 18:30 | ISHI-kai | reception | The entrance to the facility closes at this time, so if you are participating locally, please come by this time as much as possible. |
18:00 ~ 18:30 | ISHI-kai | Chat time | - |
18:30 ~ 19:15 (Lecture: 30min, Q&A: 15min) | Takeshi Hamamoto Minimal Fab Propulsion Organization Device Engineer | minimal Fab open PDK | 1) What is a minimal fab 2) openPDK 3) Design Contest at Semicon 2023 |
19:15 ~ 20:00 (Lecture: 30min., Q&A: 15min.) | Junichi Okamura IEEE Senior Member | OpenPDK and the World | - |
20:00 ~ 20:45 (Lecture: 30min., Q&A: 15min.) | @noritsuna | About the upcoming open source PDK shuttle | (To be released at a later date) |
21:00 | ISHI-kai | closing |
Nov 21, 2023
[webinar] Open Source Silicon Landscape
- Policymakers at the regional, national, and European level who want to strengthen their respective semiconductor ecosystem while collaborating and contributing to the Union’s industry as a whole
- Research and academia representatives who are interested in deepening their knowledge or discovering the potential of the Open Source Silicon landscape
- SMEs in the semiconductor industry who aim to expand and innovate their business by using a cutting-edge approach
- Start-ups that are eager to elevate their business to the next level by embracing vanguard strategies
- Citizen scientists and the general public who would like to have a better understanding of the new horizons in the semiconductor landscape
- Experts active in industrial development who are interested in integrating potential new approaches
The event is free of charge, but registration is mandatory. Registrants will receive the link to access the event by email.
11:00 - 11:05 | Welcome |
11:05 - 11:10 | Introducing Open Source Silicon |
11:10 - 11:20 | BACKGROUND Open source silicon between software and hardware Background |
11:20 - 11:40 | POLICY BRIEF PRESENTATION Open source silicon’s position in the semiconductor value chain |
11:40 - 12:35 | PANEL Key opportunities and threats relevant to open source silicon strategies |
12:35 - 12:45 | Q&A and conclusions |
Nov 10, 2023
GoIT project at Open Source Experience Event
Laboratoire d'Informatique de Paris 6 (LIP6) Sorbonne and CNRS will attend Open Source Experience event on 6-7 December in Paris to present GoIT project
Come and join the European open source community meeting!!
[ read more... ]
Sep 28, 2023
3rd MFEM Community Workshop, October 26, 2023
- Arbitrary high-order finite element meshes and spaces.
- Wide variety of finite element discretization approaches.
- Conforming and nonconforming adaptive mesh refinement.
- Scalable from laptops to GPU-accelerated supercomputers.
- ... and many more.
- See MFEM Gallery, Publications, Videos and News pages.
If you plan to attend, please register no later than October 19th. There is no registration fee. Zoom details will be distributed to participants prior to the event date. For questions, please contact the meeting organizers at mfem@llnl.gov.
Aug 2, 2023
[video] Interviews from FSiC, Paris, 2023
Interviews with selected Free Silicon Conference Participation by Matt Venn are available online:
00:23 Luca Alloatti, FSiC Organizing Committee
01:59 Thomas Benz, ETH Zurich
06:05 Jørgen Kragh Jakobsen, IC Works - Open Source Chip Design
08:57 Thomas Parry, SPHERICAL
11:05 Rene Scholz, IHP Microelectronics
14:06 Dan Fritchman, UC Berkeley
18:41 Harald Pretl, Johannes Kepler University Linz
All the conference proceedings (slide presentations and prerecorded talks) are also available at the FSiC website.
Jun 9, 2023
[Workshop] Open Source PDKs and EDA
- Makoto Ikeda (The University of Tokyo)
- Mehdi Saligane (University of Michigan)
- Design experience: “The Journey of Two Novice LSI Enthusiasts: Tape-Out of CPU+RAM in Just One Month”, Kazuhide Uchiyama, University of Electro-Communications and Yuki Azuma, University of Tsukuba
- From Zero to 1000 Open Source Custom Designs in Two Years, Mohamed Kassem, Co-founder and CTO, Efabless
- The SKY130 Open Source PDK: Building an Open Source Innovation Ecosystem, Steve Kosier, Skywater technology
- Open Source Chip Design on GF180MCU – A foundry perspective, Karthik Chandrasekaran, Global Foundries
- Japan Foundries' Perspectives on Silicon design democratization, Shiro Hara, Minimal Fab & AIST
- Google's perspective on Open source PDKs, Open source EDA tools, and OpenMPW shuttle program, Johan Euphrosine and Tim Ansell, Google
- The Nanofabrication Accelerator Project, Matthew Daniels, NIST
- Japanese government perspective on Silicon design democratization, Yohei Ogino, The Ministry of Economy, Trade and Industry METI
Mar 22, 2023
[analog-wg] Video of March 21 AWG Meeting
The AWG Video Meeting on March 21, 2023 included two presentations:
- Ken Kundert "Why Fund OpenVAF"
- Pascal Kuthe "OpenVAF: An innovative open-source Verilog-A Compiler"
- 4th April: Update from Tim Edwards: Magic and PEX extraction
- 18th April: Update from Sadayuki Yoshitomi: Ecosystem of compact model development
- 2nd May (tentative): Update from C. Enz,EPFL: test structures measurements
Mar 6, 2023
[open position] IHP Research Associate for Open PDK Development
The position:
Your profile:
Your application:
Have we sparked your interest? Then we look forward to receiving your application via our online application form. For further information regarding the position, please contact Dr. René Scholz
Feb 8, 2023
[paper] OpenSpike: An OpenRAM SNN Accelerator
OpenSpike: An OpenRAM SNN Accelerator
arXiv:2302.01015v1 [cs.AR] 2 Feb 2023
1) Dept. of Electrical Engineering Allameh Mohaddes Nouri University Nur, Mazandaran, Iran
2) Dept. of Computer Science and Engineering, UC Santa Cruz Santa Cruz, CA, United States
3) Dept. of Electrical and Computer Engineering, UC Santa Cruz Santa Cruz, CA, United States
Abstract: This paper presents a spiking neural network (SNN) accelerator made using fully open-source EDA tools, process design kit (PDK), and memory macros synthesized using Open- RAM. The chip is taped out in the 130 nm SkyWater process and integrates over 1 million synaptic weights, and offers a reprogrammable architecture. It operates at a clock speed of 40 MHz, a supply of 1.8 V, uses a PicoRV32 core for control, and occupies an area of 33.3 mm2. The throughput of the accelerator is 48,262 images per second with a wallclock time of 20.72 μs, at 56.8 GOPS/W. The spiking neurons use hysteresis to provide an adaptive threshold (i.e., a Schmitt trigger) which can reduce state instability. This results in high performing SNNs across a range of benchmarks that remain competitive with state-of-the-art, full precision SNNs.
The design is open sourced and available online: https://github.com/sfmth/OpenSpike
Dec 20, 2022
[OpenVAF] Next-Generation Verilog-A Compiler
Roadmap: OpenVAF is still in development and there many goals we aim to achieve in the longterm:
- Noise analysis (planned for 2023)
- Reaching full compliance with the Verilog-A standard
- Behavioral modelling features
- Support for features that allow defining full circuits/full PDKs in Verilog-A
- OSDI integration in Xyce
- Improved documentation
- A detailed paper about the technical innovations in OpenVAF and attendance at international conferences
Circuit simulators play a critical role in the design of electrical circuits. Accurate simulations enable circuit designers to validate circuit behavior before actual fabrication happens, potentially saving significant re-design costs. The simulation of a circuit critically depends on the so-called compact models and therefore:
- The accuracy of the compact-model equations
- The quality of the model parameters
The complexity of compact models has made the manual integration into simulators a tedious, error-prone and therefore expensive task. One reason for this is that not only the model equations have to be implemented, but also their symbolic derivatives. Numeric derivatives are not an option because they are orders of magnitude slower to compute than analytical derivatives and can introduce convergence problems due to inaccuracies. It is not uncommon - even in commercial tools - to find model implementation bugs or to observe convergence problems that result from incorrectly implemented derivatives. Some simulators with no or limited Verilog-A integration do not implement certain compact-models and can therefore not be used to simulate some processes at all.
Manually implemented compact models may differ between simulators since EDA vendors often rename parameters or alter particular model equations. Due to these simulator specific peculiarities, PDKs can usually only be used by a few specific simulators.
Verilog-A has been developed to address these problems and has become the de-facto standard for developing and distributing compact models. It allows implementing compact models via a simulator independent and standardized language. Verilog-A compilers can translate these models to machine code and allow simulators to use these models without manually implementing them. Verilog-A enables:
- model development and customization by allowing to quickly modify the model equations without having to worry about model implementation details.
- implementing behavioral or data-driven models, or even entire circuits.
- inherent portability between simulators for both models and PDKs that would not be possible with traditional netlist-based formats.
Sep 21, 2021
[paper] BioDynaMo: a modular platform for high-performance agent-based simulation
1 CERN openlab, CERN, European Organization for Nuclear Research, Geneva, Switzerland
2 ETH Zurich, Swiss Federal Institute of Technology in Zurich, Zurich, Switzerland
3 Delft University of Technology, Delft, The Netherlands
4 Department of Mechanical & Manufacturing Engineering, University of Cyprus, Nicosia, Cyprus
5 Department of Medical Physics & Biomedical Engineering, University College London, UK
6 School of Computing, Newcastle University, Newcastle upon Tyne, UK
7 Department of Functional Neurosurgery, Ruijin Hospital, Shanghai Jiao Tong University School of Medicine, Shanghai, China
8 Precision Imaging Beacon, School of Medicine, University of Nottingham, UK
9 SCimPulse Foundation, Geleen, Netherlands
10 Department of Computer Science, University of Surrey, Guildford, UK
Jul 8, 2021
[paper] eSim: An Open Source EDA Tool
Indian Institute of Technology Bombay, Mumbai, Maharashtra, India
* Vellore Institute of Technology Chennai, Tamil Nadu, India
Jan 5, 2021
[paper] NESS Open-Source TCAD Environment
Sep 7, 2020
[paper] Vertical Graphene–hBCN Heterostructure TFETs
1Department of Electrical Engineering, Arak Branch, Islamic Azad University, Arak, Iran
2Department of Electrical Engineering, Faculty of Engineering, Arak, Iran
Jun 17, 2019
[open source paper] Open-source circuit simulation tools for RF compact semiconductor device modelling
KEYWORDS: CAD; GNU; Qucs; QucsStudio; ngspice; compact modeling; EKV3; RF; MOSFET; Verilog-A
May 10, 2016
#BOOK: Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology
The second of two volumes in the Electronic Design Automation for Integrated Circuits Handbook, Second Edition, EDA for IC Implementation, Circuit Design, and TCAD thoroughly examines real-time logic (RTL) to GDSII (a file format used to transfer data of semiconductor physical layout) design flow, analog/mixed signal design, physical verification, and technology computer-aided design (TCAD). Chapters contributed by leading experts authoritatively discuss design for manufacturability (DFM) at the nanoscale, power supply network design and analysis, design modeling, and much more.
Feb 24, 2016
LibreCAD: Call for Your POTM Vote
Oct 29, 2015
[Call for Participation] FOSDEM 2016 Electronic Design Automation Devroom
- Printed Circuit Board (PCB) design tools (e.g. KiCad and gEDA)
- Analogue and digital simulators (e.g. ngspice, Qucs, Gnucap, Xyce, GHDL, Icarus and Verilator)
- Any other EDA tools such as high-level tools for digital hardware design (e.g. Migen)
- Inter-project opportunities for collaboration
Please submit your proposals at https://penta.fosdem.org/submission/FOSDEM16
- 4 December 2015: deadline for submission of proposals
- 18 December 2015: announcement of final schedule
- 30 January 2016: devroom day