Showing posts with label numerical semiconductor device simulations. Show all posts
Showing posts with label numerical semiconductor device simulations. Show all posts

Nov 27, 2019

Open PhD/PostDoc positions at the University of Pisa

device and 2D materials modeling, analog circuit design, 
power electronics, wireless sensors design

We are in the process of opening a few positions for PhD students and for Post Docs at the University of Pisa, in the fields of modeling of nanoscale electron devices, 2D materials, analog circuit design, power electronics design and wireless sensors for harsh environments. We are now asking for expressions of interest from perspective candidates.

I would be very grateful if you could forward this information to whom you think could be interested in applying.

Expressions of interest must be submitted by email, together with a CV and contact information by 31 Dec 2019 to giuseppe.iannaccone@unipi.it.

The available research topics are listed below. They are typically performed in the framework of a larger project within a European collaboration or of a bilateral project with an industrial sponsor.

1. Theoretical investigation of ultra-low-power nanoscale transistors and memories for large scale integrated circuits. This will include devices based on heterostructures of 2D materials. We are looking for candidates with strong background in Electrical Engineering and/or Physics.

2. Quantum engineering of materials and devices based on heterostructures of 2D materials. This activity is based on materials modeling with quantum chemistry methods and quantum transport modeling. We are looking for candidates with strong background in Physical Chemistry and/or Physics.

3. Design of low-power analog integrated circuits for analog hardware  accelerators of artificial intelligence (deep learning) algorithms and for new computing architectures. We are looking for candidates with strong background in Electrical Engineering.

4. Design of low-power mixed signal circuits for security hardware, such as physical unclonable functions and hardware security signatures. We are looking for candidates with strong background in Electrical Engineering.

5. Modeling of power devices based on GaN and SiC for performance and reliability optimization and model development. We are looking for candidates with strong background in Electrical Engineering and/or in Physics.

6. Design of highly efficient power management circuits and systems based on switched capacitors. Both circuits based on silicon technology, on SiC and on GaN will be considered. We are looking for candidates with strong background in Electrical Engineering.

PhD positions are for three years, Post Doc positions are initially for one year and might be renewed for up to four years. Positions of shorter duration (for visiting students/scholars or for MS  thesis projects) might be considered depending on the expertise of the candidate and the definition of a suitable subproject.

For additional information and specific information on the projects, please send an email to
Prof. Giuseppe Iannaccone
giuseppe.iannaccone@unipi.it

Dec 12, 2016

[Fellowship] Physics Based Modeling Simulation and Electrical Characterization

Physics Based Modeling Simulation and Electrical Characterization 
of Quantum Effects in Multigate MOSFETs
[DRDO Fellowship]

Dr. Vimala Palanichamy is looking for Junior Research Fellowship (INR 25000 Stipend per Month) for this project funded by Defense Research and Development Organization (DRDO), Government of India. Please refer below advertisement for applying for Junior Research Fellowship for working on the project: 

Feb 7, 2016

Device to GDSII for IC Design Training

Hands on Training Program on “Device to GDSII for IC Design”
on 22-27 Feb 2016
Organized by VLSI Division of School of Electronics Engineering
Vellore Institute of Technology, Near Katpadi Rd Vellore, Tamil Nadu - 632014


The relentless march fast of the CMOS has slowed down and the semiconductor industry is looking for novel and innovative devices. Many novel devices are being explored currently. TCAD and Cadence tool allows us to generate new structures, circuits and analyze its performance. Unlike other circuit simulators, TCAD and Cadence needs a special training. This hands on training addresses this gap.

Target Audience: Faculty, students and research scholars from various engineering colleges of India. The number of participants is limited to 40. 

Topics to ďe addressed:

Using TCAD:
  • Structure Creation, Simulation and Device Simulation 
  • Process Simulation 
  • Multi-gate Transistors 
  • Radiation study on devices and circuits
Using Cadence: 
  • RTL Design and Simulation 
  • Synthesis and low power synthesis Using RTL Compiler 
  • Physical aware synthesis and DFT 
  • Block and Top Level P&R Using SOC Encounter 
  • STA Using Timing Engine 


Mar 10, 2014

website http://www.tcad.com is up and running

The www.tcad.com website promoting open source Technology Computer Aided Design and posting related news is up and running. Among other news there is also update of the DEVSIM Open Source TCAD Simulator which is available for download at SourceForge, now.  Packages are available for:
  • Mac OS X Mavericks
  • Red Hat 6.5
  • Ubuntu 12.04
For more information about the project, including source code availability, please visit DEVSIM webpage. Additional resource are also available at the TCADCentral 

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