Showing posts with label Verilog-AMS. Show all posts
Showing posts with label Verilog-AMS. Show all posts

Nov 6, 2023

Verilog-AMS in Gnucap

Mixed-Signal Modelling and Simulation with Verilog-AMS
Verilog-AMS is a standardised modelling language widely used in analog and mixed-signal design, but without an open reference implementation. The language supports high-level behavioural descriptions as well as structural descriptions of systems and components. This Project will make substantial progress towards a Gnucap based free/libre Verilog-AMS implementation. Gnucap is a modular mixed-signal circuit simulator, and has been released under a copyleft license with the intent to avoid patent issues. Gnucap provides partial support for structural Verilog and encompasses an analog modelling language that has influenced the Verilog standards. We will enhance data structures and algorithms in Gnucap, and improve Verilog support on the simulator level. We will implement a Verilog-AMS behavioural model generator targetting Gnucap with the intent to support simulators with similar architecture later on. The project's own website:
Task 1. modelgen-verilog: Provide a replacement for ADMS
Task 2. Verilog-AMS compliance on the simulator level
Task 3. Compiler optimisations

Acknowledgement: This project was funded through the NGI0 Entrust Fund, a fund established by NLnet with financial support from the European Commission's Next Generation Internet programme, under the aegis of DG Communications Networks, Content and Technology under grant agreement No 101069594.

Feb 22, 2022

[paper] Analytic Modeling of Passive Microfluidic Mixers

Alexi Bonament1, Alexis Prel1, Jean-Michel Sallese2, Christophe Lallement1
and Morgan Madec1
Analytic modelling of passive microfluidic mixers
Mathematical Biosciences and Engineering (2022)
Vol. 19, No. 4: 3892-3908
DOI: 10.3934/mbe.2022179
   
1. ICube, UMR 7357, Universite de Strasbourg/CRNS (F)
2. STI-IEL-Electronics Laboratory, EPFL (CH)


Abstract: This paper deals with a new analytical model for microfluidic passive mixers. Two common approaches already exist for such a purpose. On the one hand, the resolution of the advection-diffusion-reaction equation (ADRE) is the first one and the closest to physics. However, ADRE is a partial differential equation that requires finite element simulations. On the other hand, analytical models based on the analogy between microfluidics and electronics have already been established. However, they rely on the assumption of homogeneous fluids, which means that the mixer is supposed to be long enough to obtain a perfect mixture at the output. In this paper, we derive an analytical model from the ADRE under several assumptions. Then we integrate these equations within the electronic-equivalent models. The resulting models computed the relationship between pressure and flow rate in the microfluidic circuit, but also takes the concentration gradients that can appear in the direction perpendicular to the channel into account. The model is compared with the finite element simulation performed with COMSOL Multiphysics in several study cases. We estimate that the global error introduced by our model compared to the finite element simulation is less than 5% in every use case. In counterparts, the cost in terms of computational resources is drastically reduced. The analytical model can be implemented in a large range of modelling and simulation languages, including SPICE and hardware description language such as Verilog-AMS. This feature is very interesting in the context of the in silicon prototyping of large-scale microfluidic devices or multi-physics devices involving microfluidic circuits, e.g. lab-on-chips.

Fig:  Schematic of the Y-shaped passive mixer. The device is composed of two inlets (here, one is the water and the other is a dye) and one outlet. As we can see on this cartoon (which is purely illustrative and not a simulation result), the mixing is established along the channel and, for a short channel, the dye concentration is not homogeneous in the x direction.

Acknowledgments: This research was supported by the European Regional Development Fund (ERDF) and the Interreg V Upper Rhine Offensive Sciences Program (Project 3.14 – Water Pollution Sensor).




May 5, 2020

[paper] reached 2000 reads at ResearchGate


Grabiński, Władysław, Daniel Tomaszewski, Laurent Lemaitre, and Andrzej Jakubowski
Standardization of the compact model coding: non-fully depleted SOI MOSFET example
Journal of Telecommunications and Information Technology (2005): 135-141.

Abstract - The initiative to standardize compact (SPICE-like) modelling has recently gained momentum in the semiconduc-tor industry. Some of the important issues of the compact modelling must be addressed, such as accuracy, testing, avail-ability, version control, verification and validation. Most com-pact models developed in the past did not account for these key issues which are of highest importance when introducing a new compact model to the semiconductor industry in par-ticular going beyond the ITRS roadmap technological 100 nm node. An important application for non-fully depleted SOI technology is high performance microprocessors, other high speed logic chips, as well as analogue RF circuits. The IC de-sign process requires a compact model that describes in detail the electrical characteristics of SOI MOSFET transistors. In this paper a non-fully depleted SOI MOSFET model and its Verilog-AMS description will be presented. 

Fig: Approximation of the distribution of currents components
in the non-fully depleted SOI MOSFET.  

Keywords: Verilog-AMS, compact model coding, SOI MOSFET.

References:
  1. ITRS Roadmap Update, 2003, http://www.public.itrs.net
  2. Open Verilog International, "Verilog-AMS, Language Reference Manual", Version 1.9, 1999, http://www.accellera.org/
  3. D. Tomaszewski, "Consistent DC and AC models of non-fully depleted SOI MOSFETS in strong inversion", in Proc. 9th Int. Conf. Mix.-Sig. Des. Integr. Cir. Syst. MIXDES, Wrocław, Poland, 2002, pp. 111-114.
  4. L. Lemaitre, C. McAndrew, and S. Hamm, "ADMS - automatic device model synthesizer", in Proc. IEEE CICC 2002, Florida, USA, 2002, pp. 27-30.
  5. J. R. Hauser, "Small signal properties of field effect devices", IEEE Trans. Electron Dev., vol. 12, pp. 605-618, 1965.
  6. D. Tomaszewski, "A small-signal model of SOI MOSFETs capacitances". Ph.D. thesis, Institute of Electron Technology, Warsaw, 1998.
  7. L. Lemaitre, W. Grabiński, and C. McAndrew, "Compact device modeling using Verilog-A and ADMS", in Proc. 9th Int. Conf. Mix.-Sig. Des. Integr. Cir. Syst. MIXDES, Wrocław, Poland, 2002, pp. 59-62.
  8. C. Lallement, F. Pecheux, and W. Grabiński, "High level description of thermodynamical effects in the EKV 2.6 most model", in Proc. 9th Int. Conf. Mix.-Sig. Des. Integr. Cir. Syst. MIXDES, Wrocław, Poland, 2002, pp. 45-50.

Aug 1, 2017

[paper] Circuit-level simulation methodology for Random Telegraph Noise by using Verilog-AMS


T. Komawaki, M. Yabuuchi, R. Kishida, J. Furuta, T. Matsumoto and K. Kobayashi
Circuit-level simulation methodology for Random Telegraph Noise by using Verilog-AMS
2017 IEEE ICICDT, Austin, TX, USA, 2017, pp. 1-4.
doi: 10.1109/ICICDT.2017.7993526

Abstract: As device sizes are downscaled to nanometer, Random Telegraph Noise (RTN) becomes dominant. It is indespensable to accurately estimate the effect of RTN. We propose the RTN simulation method for analog circuits. It is based on the charge trapping model. We replicate the RTN-induced threshold voltage fluctuation to attach a variable DC voltage source to the gate of MOSFET by using Verilog-AMS. We confirm that drain current of MOSFETs temporally fluctuates. The fluctuations of RTN are different for each MOSFET. Our proposed method can be applied to estimate the temporal impact of RTN including multiple transistors. We can successfully replicate RTN-induced frequency fluctuations in 3-stage ring oscillators as similar as the measurement results [read more...]

Dec 16, 2016

[online] Verilog-AMS Quick Reference and Tutorials

Verilog-AMS is a hardware description language that can model both analog and digital systems. The official description of the Verilog-AMS language is contained in the Verilog-AMS Language Reference Manual.

This site is designed to be your quick reference guide for Verilog-A and Verilog-AMS. The reference material is not complete at this point, but is still quite usable. Over time the reference material should fill out and be supplemented with useful application notes and annotated models that will help you learn to use Verilog-A/MS more effectively. The emphasis is very much on analog and mixed-signal modeling. If you are looking for information on synthesis or the obscure corners of the Verilog language, you must look elsewhere
Both Ken & Henry at Designer’s Guide Consulting aim to make www.VerilogAMS.com your everyday source for information on Verilog-A/MS. Please take a look around, and tell your friends and co-workers. If you have questions about Verilog-AMS, feel free to ask them on
the forum at designers-guide.org.