conference paper reached 700 reads

M. Bucher, A. Bazigos and W. Grabinski, "Determining MOSFET Parameters in Moderate Inversion," 2007 IEEE Design and Diagnostics of Electronic Circuits and Systems, Krakow, 2007, pp. 1-4.

Abstract: Deep submicron CMOS technology scaling leads to reduced strong inversion voltage range due to non-scalability of threshold voltage, while supply voltage is reduced. Moderate inversion operation therefore becomes increasingly important. In this paper, a new method of determining MOSFET parameters in moderate inversion is presented. Model parameters are determined using a constant current bias technique, where the biasing current is estimated from the transconductance-to-current ratio. This technique is largely insensitive to mobility effects and series resistance. Statistical data measured on 40 dies a 0.25 um standard CMOS technology are used for the illustration of this method.

[paper] Prediction of DC-AC Converter Efficiency Degradation

Kenshiro Sato, Dondee Navarro, Shinya Sekizaki, Yoshifumi Zoka, Naoto Yorino,
Hans Jürgen Mattausch, Mitiko Miura-Mattausch, 

Prediction of DC-AC Converter Efficiency Degradation due to Device Aging
Using a Compact MOSFET-Aging Model

IEICE Transactions on Electronics

論文ID 2019ECP5010, [早期公開] 公開日 2019/09/02

Online ISSN 1745-1353, Print ISSN 0916-8524, https://doi.org/10.1587/transele.2019ECP5010,
https://www.jstage.jst.go.jp/article/transele/advpub/0/advpub_2019ECP5010/_article/-char/ja,

Abstract: The degradation of a SiC-MOSFET-based DC-AC converter-circuit efficiency due to aging of the electrically active devices is investigated. The newly developed compact aging model HiSIM_HSiC for high-voltage SiC-MOSFETs is used in the investigation. The model considers explicitly the carrier-trap-density increase in the solution of the Poisson equation. Measured converter characteristics during a 3-phase line-to-ground (3LG) fault is correctly reproduced by the model. It is verified that the MOSFETs experience additional stress due to the high biases occurring during the fault event, which translates to severe MOSFET aging. Simulation results predict a 0.5% reduction of converter efficiency due to a single 70ms-3LG, which is equivalent to a year of operation under normal conditions, where no additional stress is applied. With the developed compact model, prediction of the efficiency degradation of the converter circuit under prolonged stress, for which measurements are difficult to obtain and typically not available, is also feasible.

Yannis Tsividis' Early Contributions to MOS Filters

In the 1970s, when the bipolar transistor was the undisputed king of analog integrated circuits (ICs), most electrical engineers regarded the MOS transistor as a second-rate device for ICs: it was a good switch, but a mediocre amplifier. As a graduate student at UC Berkeley, under the supervision of Paul Gray, Yannis Tsividis had a very different vision. He saw the MOS transistor as the future star for mixed-signal ICs and was excited to prove to the world he was right. The opening gambit was his thesis work demonstrating the first fully-integrated MOS opamp. This single achievement propelled him to the top of his generation of researchers and earned him a Berkeley PhD degree, a teaching appointment at Columbia University and a consulting position at Bell Laboratories.

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REF:
Khoury, J.; Banu, M., "Yannis Tsividis' Early Contributions to MOS Filters," Solid-State Circuits Magazine, IEEE , vol.6, no.4, pp.36,40, Fall 2014
doi: 10.1109/MSSC.2014.2347772