Showing posts with label HF. Show all posts
Showing posts with label HF. Show all posts

Oct 25, 2023

[paper] Sub-THz HICUM for SiGe HBTs

Soumya Ranjan Panda, Thomas Zimmer, Anjan Chakravorty, Nicolas Derrier
and Sebastien Fregonese
Exploring Compact Modeling of SiGe HBTs in Sub-THz Range With HICUM
in IEEE TED, DOI: 10.1109/TED.2023.3321017.

IMS laboratory, CNRS, University of Bordeaux (F)
Department of Electrical Engineering, IIT Madras (IN)
STMicroelectronics, 38920 Crolles (F)


Abstract : This study delves deeper into the high frequency (HF) behavior of state-of-the-art sub-THz silicon germanium heterojunction bipolar transistors (SiGe HBTs) fabricated with 55 nm BiCMOS process technology from STM. Using measurement data, calibrated TCAD simulations, and compact model simulations, we present a comprehensive methodology for extracting several HF parameters (related to parasitic capacitance partitioning and nonquasi-static effects) of the industry standard model, HICUM. The parameter extraction strategies involve thorough physics-based investigation and sensitivity analysis. The latter allowed us to precisely evaluate the effects of parameter variations on frequency dependent characteristics. The accuracy of the finally deployed model is tested by comparing the model simulation with measured small-signal two-port parameters of SiGe HBTs up to 330 GHz.
FIG: a.)  TEM image of the SiGe HBT device; b.) 2D TCAD structure simulation; c.) Large signal equivalent circuit of HICUM L2 compact model; d.) and e.) adjunct networks for vertical NQS effects

Acknowledgment: The authors would like to acknowledge Dider Celi, STM, for valuable discussion about the compact modeling of heterojunction bipolar transistors (HBTs), and they also like to thank STM for providing the silicon wafers. This work was supported by NANO2022 Important Project of Common European Interest Project (IPCEI), and SHIFT Grant ID 101096256.


Feb 9, 2017

[Book] Low-power HF Microelectronics: a unified approach

Low-power HF Microelectronics: a unified approach 
ISBN: 9780852968741 e-ISBN: 9781849193610
Editor: Gerson A. S. Machado
Department of Electronic Engineering
Imperial College of Science, Technology and Medicine
London, UK
Front Matter
1 Low-power HF microelectronics: a unified approach
Part 1: Process technology
2 Device structures and device simulation techniques
3 Stanford's ultra-low-power CMOS technology and applications
4 SOI technology
5 Radiation effects on ICs and a mixed analog CMOS-NPN-PJFET-on-insulator technology
Part 2: Device modelling/characterisation and circuit simulation
6 Modelling and characterisation of GaAs devices
7 The EKV Model: a MOST Model Dedicated to Low-Current and Low-Voltage Analogue Circuit Design and Simulation
8 Non-linear dynamic modelling of RF bipolar transistors
9 APLAC - object-oriented circuit simulator and design tool
10 Noise coupling in mixed-signal ASICs
Part 3: Reliability and test
11 Robust design and reliability analysis
12 Dynamic reliability of systems
13 Fault modelling and simulation for the test of integrated analog and mixed-signal circuits
Part 4: Circuit and system design methodology
14 High-speed and low-power techniques in CMOS and BiCMOS
15 Ultra-low-power digital design
16 Matched delay technique for high-speed digital design
17 Statistical design and optimisation for high-yield BiCMOS analog circuits
18 Design considerations for high-speed amplifiers using complementary BJTs
19 S2I techniques for analog sampled-data signal processing
20 Design of wireless portable systems
21 Low-power radio-frequency ICs and system architectures for portable communications
22 Analog and digital CMOS design for spread-spectrum wireless communications
23 Design considerations for BJT active mixers
24 Distortion in short channel FET circuits
25 Intelligent sensor systems and smart sensors: concepts, focus points and technology
26 Intelligent sensor systems and smart sensors: applications
Back Matter