Thursday, 30 June 2016

Tutorial on Signal Processing in Linux with Octave https://t.co/Lzoeytzqwt #todo #feedly #papers


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July 01, 2016 at 08:13AM
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The #EAGLE has landed: at #Autodesk! #papers #opensource #kicad https://t.co/pKRvYSLMhd


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June 30, 2016 at 10:13AM
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TFT Small Signal Model and Analysis #DOMINO #papers https://t.co/NcRpCSjCQk


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June 30, 2016 at 10:05AM
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Friday, 24 June 2016

Is a Road To #5nm https://t.co/ks8mDGXr2g #papers


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June 24, 2016 at 09:27PM
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Large-Signal Verilog-A Model of Graphene Field-Effect Transistors #papers https://t.co/YvjUJBBp9n


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June 24, 2016 at 09:24PM
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Power Semiconductor Devices and Smart Power IC Technologies CFP https://t.co/1N4eQf5ufj #papers #feedly


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June 24, 2016 at 07:58PM
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#Science in #China https://t.co/dZfpCgzuVs #papers #feedly


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June 24, 2016 at 07:46PM
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Proposal of Physics-Based Equivalent Circuit of Pseudo-#MOSCap Structure for Impedance Spectroscopy https://t.co/yjZkpnrwQo #papers #feedly


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June 24, 2016 at 07:37PM
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#China #R&D by the numbers https://t.co/43JN3uARBC #papers #feedly https://t.co/s6vOoDT9ir


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June 24, 2016 at 07:35PM
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#China #R&D by the numbers https://t.co/43JN3uARBC #papers #feedly


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June 24, 2016 at 07:35PM
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Assessment of InAs/AlGaSb Tunnel-FET Virtual Technology Platform for Low-Power Digital Circuits https://t.co/1gydKvYkKV #papers #feedly


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June 24, 2016 at 09:10AM
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Tuesday, 21 June 2016

Analysis and Performance Study of III–V Schottky Barrier Double-Gate MOSFETs Using a 2-D Analytical Model https://t.co/vLSMO52Cys #papers


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June 21, 2016 at 03:24PM
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Saturday, 18 June 2016

New Y-function based MOSFET parameter extraction method from weak to strong inversion range https://t.co/qIhncY55c7 #papers #feedly


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June 18, 2016 at 09:13PM
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Friday, 17 June 2016

Organic Semiconductors Books to Download https://t.co/7ccToLje3o #papers


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June 17, 2016 at 09:37AM
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Thursday, 16 June 2016

Near-Threshold Computing https://t.co/KUUFizDja3 #papers


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June 16, 2016 at 02:37PM
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Wednesday, 15 June 2016

A practical guide to SOI by Incize https://t.co/9JPT9AbwT1 #papers


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June 16, 2016 at 08:43AM
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[mos-ak] [Final Program] International MOS-AK Workshop Shanghai June 26-28 2016

 International MOS-AK Workshop
 Shanghai, June 26-28, 2016
 The Final MOS-AK Workshop Technical Program

 Together with the MOS-AK Honorary Committee: Xi Wang (SIMIT), Tzu-Yin Chiu, (SMIC),  Ming-Kai Tsai, (MediaTek SRC/CMC), the Extended MOS-AK TPC Committee as well as local organizers Min Zhang (SIMTAC) and Eva Tu (SIMTAC), we have pleasure to invite to the MOS-AK Workshop which will be held in Shanghai between June 26-28, 2016. The MOS-AK workshop is organized with aim to strengthen an academic/industry network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/SPICE modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD/EDA tool developers and vendors. In addition, on June 26, 2016, dedicated compact modeling/characterization tutorial courses are also prepared for all workshop attendees.

Venue:   
865 Changning Road, Building No. 5, on the 3rd Floor, 
Conference Hall,
Changning District, Shanghai (CN)

Online Workshop Registration:
<http://www.simtac.org/?p=156&lang=zh>
(or contact MOS-AK Workshop Secretary: Eva Tu (Shanghai) <wanv.tu@simtac.org>)

The Workshop Agenda and its Program is available online:
<http://www.mos-ak.org/shanghai_2016/>
Postworkshop Publications:
Selected best MOS-AK technical presentation will be recommended for further publication in a special compact modeling issue of the International Journal of High Speed Electronics and Systems (IJHSES)

Extended MOS-AK Committee

WG15062016
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[mos-ak] [Final Program] International MOS-AK Workshop in Shanghai on June 26-28, 2016

 International MOS-AK Workshop
 Shanghai, June 26-28, 2016
 The Final MOS-AK Workshop Technical Program

 Together with the MOS-AK Honorary Committee: Xi Wang (SIMIT), Tzu-Yin Chiu, (SMIC),  Ming-Kai Tsai, (MediaTek SRC/CMC), the Extended MOS-AK TPC Committee as well as local organizers Min Zhang (SIMTAC) and Eva Tu (SIMTAC), we have pleasure to invite to the MOS-AK Workshop which will be held in Shanghai between June 26-28, 2016. The MOS-AK workshop is organized with aim to strengthen an academic/industry network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/SPICE modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD/EDA tool developers and vendors. In addition, on June 26, 2016, dedicated compact modeling/characterization tutorial courses are also prepared for all workshop attendees.

Venue:   
865 Changning Road, Building No. 5, on the 3rd Floor, 
Conference Hall,
Changning District, Shanghai (CN)

Online Workshop Registration:
<http://www.simtac.org/?p=156&lang=zh>
(or contact MOS-AK Workshop Secretary: Eva Tu (Shanghai) <wanv.tu@simtac.org>)

The Workshop Agenda and its Program is available online:
<http://www.mos-ak.org/shanghai_2016/>
Postworkshop Publications:
Selected best MOS-AK technical presentation will be recommended for further publication in a special compact modeling issue of the International Journal of High Speed Electronics and Systems (IJHSES)

Extended MOS-AK Committee

WG15062016
--
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Tuesday, 14 June 2016

[book] Compact Models for Integrated Circuit Design

 Compact Models for Integrated Circuit Design: 
 Conventional Transistors and Beyond
 Samar K. Saha
Taylor & Francis, 26 Aug 2015 - Technology & Engineering - 545 pages - ISBN 9781482240665

Compact Models for Integrated Circuit Design: Conventional Transistors and Beyond provides a modern treatise on compact models for circuit computer-aided design (CAD). Written by an author with more than 25 years of industry experience in semiconductor processes, devices, and circuit CAD, and more than 10 years of academic experience in teaching compact modeling courses, this first-of-its-kind book on compact SPICE models for very-large-scale-integrated (VLSI) chip design offers a balanced presentation of compact modeling crucial for addressing current modeling challenges and understanding new models for emerging devices.
Starting from basic semiconductor physics and covering state-of-the-art device regimes from conventional micron to nanometer, this text:
  • Presents industry standard models for bipolar-junction transistors (BJTs), metal-oxide-semiconductor (MOS) field-effect-transistors (FETs), FinFETs, and tunnel field-effect transistors (TFETs), along with statistical MOS models
  • Discusses the major issue of process variability, which severely impacts device and circuit performance in advanced technologies and requires statistical compact models
  • Promotes further research of the evolution and development of compact models for VLSI circuit design and analysis
  • Supplies fundamental and practical knowledge necessary for efficient integrated circuit (IC) design using nanoscale devices
  • Includes exercise problems at the end of each chapter and extensive references at the end of the book

Compact Models for Integrated Circuit Design: Conventional Transistors and Beyond is intended for senior undergraduate and graduate courses in electrical and electronics engineering as well as for researchers and practitioners working in the area of electron devices. However, even those unfamiliar with semiconductor physics gain a solid grasp of compact modeling concepts from this book. [more...]

Monday, 13 June 2016

Programme of the 4th Training Course on Compact Modeling

The 4th Training Course on Compact Modeling (TCCM) will take place in Tarragona (Catalonia, Spain) from June 27 to 28 2016.

The 4th TCCM is partially sponsored by the DOMINO EU H2020 project. It will consist a series of lectures conducted by prestigious researchers in the field of modeling of semiconductor devices, dealing with several issues related to the semiconductor device modeling, mostly compact/SPICE modeling. It is a very interesting event to PhD students and young researchers, but can interest senior researchers too. These lectures will be conducted by top experts in the field. 

No doubt the 4th TCCM will be useful to researchers working on compact modeling, but also to researchers working on circuit design, numerical modeling, device characterization and semiconductor device technology.

TCCM is organized by the Department of Electronic, Electrical and Automatic Control Engineering (DEEEiA) of the Universitat Rovira i Virgili (URV), in Tarragona. The General Chair of TCCM is Prof. Benjamin Iñiguez, who is also the Coordinator of the DOMINO project.

Programme of TCCM:

June 27 2016

8:30
Opening
Benjamin Iñiguez (Universitat Rovira i Virgili)
8:55
"Compact modeling for biological applications".
Morgan Madec (Université de Strasbourg, France)
10:05
"TCAD and semiclassical device modeling"
 Christoph Jungemann (RWTH-AAchen, Germany)
11:15
Coffe Break
11:40
"Modeling and experimental verification of mechanical stress effects in  ultra-thin Si MOSFET devices integrated into flexible packages. "
Heidrun Alus (AdMOS GmbH, Germany)
12:50
"Device simulation for Organic Electronics using GENIUS"
Heinz Olav Müller (Plastic Logic GmbH, Germany))
14:00
Lunch
15:15
"TCAD for compact model development"
Ahmed Nejim (Silvaco Europe Ltd. , UK)
16:25
"Modelling of Amorphous-Oxide-Semiconductors TFTs for large-area flexible electronics"
Fabrizio Torricelli (University of Brescia, Italy)
20:30
Gala Dinner


June 28 2016

8:45-14:00  Mini-Colloquium on Compact Modeling and Parameter Extraction
8:45
"An Integrated Approach for Circuit Performance and Reliability Simulation"
Mansun Chan (Hong Kong University of Science and Technology)
9:55
"Static and dynamic characterization of SiC based MOSFETs/IGBTs"
Muhammad Nawaz (ABB Sweden)
11:05
Coffee Break
11:30
“Model parameter extraction”
Antonio Cerdeira (CINVESTAV Mexico)
12:50
"Compact modeling for AlGaN/GaN HEMTs"
Benjamin Iñiguez (URV)
14:00
Lunch
15:15
"Application of compact models for organic circuit design"
Eugenio Cantatore (TU-Eindhoven, The Netherlands)
16:25
« Mathematical and Semi-physical compact modeling for emerging technologies”
Firas Mohamed (Infiniscale, France)
17:35
End of the Training Course

Besides, on June 29 1016, the  Workshop on Flexible Electronics (WFE) will take place in Tarragona, too. Attendees to TCCM who work on Flexible Electronics (not necessarily modeling) will have a chance to present recent results on their own. But WFE is open to all researchers.


Registration to both events is open. It is possible to register only to TCCM, or only to WFE or to both. It is quite cheap, in partular for students, and includes lunches, coffee breaks, and in the case of TCCM, a gala dinner.

Finally, on June 30-July 1 the Annual Graduate Student Meeting on Electronic Engineering will be held, consisting of plenary talks by prestigious researchers and student presentations. Registration is free.



I encourage researchers on semiconductor devices and circuit design to attend TCCM!

Saturday, 11 June 2016

Modeling and simulation of nanomagnetic logic with cadence virtuoso using Verilog-A https://t.co/J8R9fcdtDu #papers #feedly


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June 11, 2016 at 01:22PM
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Wednesday, 8 June 2016

Improved modeling of GaN HEMTs for predicting thermal and trapping-induced-kink effects https://t.co/YanqSVXH3q #papers #feedly


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June 08, 2016 at 01:44PM
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Monday, 6 June 2016

A novel approach for the modeling of HEMT high power device https://t.co/rDLgFItU1g #papers #feedly


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June 06, 2016 at 06:38PM
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Thursday, 2 June 2016

A new constituent of electrostatic energy in semiconductors

 A new constituent of electrostatic energy in semiconductors
 An attempt to reformulate electrostatic energy in matter
 
 Swiss Federal Institute of Technology Lausanne Switzerland 

Received: 30 October 2015
Received in final form: 29 January 2016
Published online: 1 June 2016

Eur. Phys. J. B, 89 6 () 136
DOI: http://dx.doi.org/10.1140/epjb/e2016-60865-4

Abstract: The concept of electric energy is revisited in detail for semiconductors. We come to the conclusion that the main relationship used to calculate the energy related to the penetration of the electric field in semiconductors is missing a fundamental term. For instance, spatial derivate of the electrostatic energy using the traditional formula fails at giving the correct electrostatic force between semiconductor based capacitor plates, and reveals unambiguously the existence of an extra contribution to the standard electrostatic free energy. The additional term is found to be related to the generation of space charge regions which are predicted when combining electrostatics with semiconductor physics laws, such as for accumulation and inversion layers. On the contrary, no such energy is needed when relying on electrostatics only, as for instance when adopting the so-called full depletion approximation. The same holds for neutral and charged insulators that are still consistent with the customary definition, but these two examples are in fact singular cases. In semiconductors for instance, this additional energy can largely exceed the energy gained by the dipoles, thus becoming the dominant term. This unexpected result clearly asks for a generalization of electrostatic energy in matter in order to reconcile basic concepts of electrostatic energy in the framework of classical physics.

Keywords: Solid State and Materials

© The Author(s) 2016. This article is published with open access at Springerlink.com