New compact modeling papers published in IEEE Transactions on Electron Devices

The September issue of IEEE Transactions on Electron Devices includes an Special Issue on Simulation and Modeling of Nanoelectronics Devices, where most papers are about numeriocal modeling and simulations.

Among the regular papers, there are many about compact modeling. It is certainly a very hot topic!

My former and excellent Ph D student Hamdy Abd El Hamid has published a great work presenting a 3D analytical model for the subthreshold swing in FinFETs. This work was done in collaboration with researchers from the SOI group at the Universite catholique de Louvain: Prof. Denis Flandre and Dr Valeria Kilchytska.

J. Deng and H-S. P. Wong present very interesting analytical models of electrostatic gate capacitance of 1-D field-effect transistors (FETs) with multiple cylindrical conducting channels. The observed agreement with 3D numerical simulations is very good. The paper also shows that effective ways to improve device speed areincreasing the number of channels per gate and reducing the gate height.

R. Kaur et al. present a unified subthreshold model for sub-100-nm nonuniformly doped channel MOSFET. The model is shown to be valid for different lateral and transverse channel-engineered structures, by comparing with 2D simulations. Based on the results obtained, the authors propose a novel device architecture incorporating the benefits of asymmetric halo and LDD doping.

W. Bian et al. present an analytic potential-based model for the undoped surrounding-gate MOSFETs. It is based on the same approach as the paper by D. Jimenez et al,as well as the one by B. Iñiguez et al. but is written on a potential-based formulation.

S. Locci et al. present an analytical model for cylindrical thin-film transistors, which was validated by comparison with experimental results. The authors also compare the performances of cylindrical TFTs with those of planar TFTs.

S. Bayshia et al. propose an analytical subthreshold surface potential model for dual-material gate MOSFETs which considers a varying depth of the channel depletion layer. Good agreement was found with 2D numerical simulations.

A. S. Roy and C. C. Enz develop an analytical large-signal cyclo-stationary low-Frequency noise with arbitrary periodic input. They show that an averaged time constant and an averaged trap density can model the cyclo-stationarity of RTS and flicker noise, respectively.

R. Grazner, F. Schwierz and V. M. Polyakov present an analytical model describing the effects of 2D quantum–mechanical carrier confinement on the threshold voltage of undoped multiple-gate MOSFETs. This model was valiudated by a comparison with self-consistent solutions of 1-D and 2-D Schroedinger and Poisson equations.

M. I. B. Shams et al. show in their paper that in a C-V model of ultrathin gate dielectric MOS devices it is necessary to include the dependence on the barrier height at the Si–dielectric interface and the substrate doping density, and they propose an empirical equation which considers these effects.

S. Kristiansson, F. Ingvarsson and K. O. Jeppsson present a compact spreading resistance model for substrate noise coupling analysis which uses no fitting parameters and is also scalable with the resistivity and thickness of the substrate, as well as with the contact size.